EDN

Co-design or bust: SoC FBGA packaging

SoC designs require the integration of digital signal processor cores, custom logic, memory and analog on a single chip. Consequently, these designs require signal integrity of critical nets, and ...
EDN

How to manage a derivative SoC project

Electrical engineers have a rule of thumb when it comes to integrated circuits: “80% of design is redesign.” Nowhere is this truer than today's approach to system-on-chips (SoCs). Not only are these ...
Electronic Design

DFT Strategies for SOC Designs

Many IC designers finally have embraced design for testability (DFT) in the form of scan insertion for digital circuit designs because of the significant time-to-production advantages these techniques ...
Semiconductor Engineering

Securing IP Integrity In Advanced SoC Design

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams.
Electronic Design

Tackling Next-Generation RF SOC Test

Developing an automated production test solution for current and next-generation complex RF SIP/SOC devices is an increasingly difficult task. Both the test program and the device interface board (DIB ...
Semiconductor Engineering

A Reliable I/O Ring For A Reliable SoC

What is an input/output (I/O) ring, and why should I care about it? If you’re a system-on-chip (SoC) designer, you had better know the answer to that question. SoCs are the darlings of the ...